Jose Antonio Boluda home page

All publications (by year)

2022

  1. A. Ghilas, C. Reig, M. D. Cubells-Beltrán, F. Pardo, J. A. Boluda, F. Vegara, S. Abrunhosa, S. Cardoso . A Compact Model of Giant Magnetoresistance Sensors for Neuromorphic Magnetic Imaging Applications. XIII European Magnetic Sensors and Actuators Conference (EMSA 2022). Madrid, July 2022. Published in the EMSA22 Abstracts Book..

  2. R. El-Byazi-Adnani, C. Reig, M. D. Cubells-Beltrán, F. Pardo, J. A. Boluda, F. Vegara, S. Abrunhosa, S. Cardoso . Finite Element Model of 3D printed microfluidic channels for Giant Magnetoresistance based sensors. XIII European Magnetic Sensors and Actuators Conference (EMSA 2022). Madrid, July 2022. Published in the EMSA22 Abstracts Book..

2021

  1. Càndid Reig, Fernando Pardo, José A. Boluda, Francisco Vegara, M. Dolores Cubells, Javio Sanchis, Sofia Abrunhosa, Susana Cardoso. Advanced Giant Magnetoresistance (GMR) sensors for Selective-Change Driven (SCD) circuits. 13th Spanish Conference on Electron Devices (CDE). pp: 58-61. Seville, June 2021. Published by IEEE Xplore.

2020

  1. Jorge Gómez, Càndid Reig, María-Dolores Cubells-Beltrán, Fernando Pardo, José-Antonio Boluda, Francisco Vegara, Sofia Abrunhosa, Susana Cardoso. Elemental GMR Sensors for Neuromorphical Applications. In proceedings of The Eleventh International Conference on Sensor Device Technologies and Applications. pp: 109-110. SENSORDEVICES 2020. pp: 1-2. Valencia, November 2020. Published by IARIA, ISBN: 978-1-61208-820-4.

  2. C. Reig, M. D. Cubells, J. Sanchis, F. Pardo, J. A. Boluda, F. Vegara, S. Cardoso. Address Event Representation (AER) approach to resistive sensor arrays. Proceedings of the Global 2020 Congress on Electrical Engineering (GC-ElecEng). pp: 6-9. Valencia, September 2020. Published by IEEE Xplore. ISBN: 978-1-938302-00-8.

2019

  1. Fernando Pardo, Càndid Reig, José A. Boluda and Francisco Vegara. A 4K-Input High-Speed Winner-Take-All (WTA) Circuit with Single-Winner Selection for Change-Driven Vision Sensors. Sensors. ISSN: 1424-8220. Vol. 19(2), 437. January 2019. pp: 1-16. Free PDF available in MDPI (open access). DOI: 10.3390/s19020437

2017

  1. Jose A. Boluda, Fernando Pardo and Francisco Vegara. High-speed Motion Detection using Event-based Sensing. In Proceedings of the 12th International Conference on Computer Vision Theory and Applications VISAPP 2017. (VISIGRAPP 2017 Joint Conference), February 2017, pp: 246-253. PDF available in SCITEPRESS digital library.

2016

  1. Jose A. Boluda, Fernando Pardo and Francisco Vegara. A Selective Change Driven System for High-Speed Motion Analysis. Sensors. ISSN: 1424-8220. Vol. 16(11), 1875. November 2016. pp: 1-19. Free PDF available in MDPI (open access). DOI: 10.3390/s16111875

2015

  1. Fernando Pardo, Jose A. Boluda and Francisco Vegara. Random telegraph signal transients in active logarithmic continuous-time vision sensors. Solid-State Electronics. ISSN: 0038-1101. Vol. 114. December 2015. pp: 111-114. PDF available in ScienceDirect DOI: 10.1016/j.sse.2015.08.025

  2. Fernando Pardo, Jose A. Boluda and Francisco Vegara. Selective Change Driven Vision Sensor With Continuous-Time Logarithmic Photoreceptor and Winner-Take-All Circuit for Pixel Selection. IEEE Journal of Solid-State Circuits. ISSN: 0018-9200. Vol. 50, Issue 3. March 2015. pp: 786-798. PDF available in IEEE Xplore. DOI: 10.1109/JSSC.2014.2386899

2014

  1. Fernando Pardo, Jose A. Boluda and Francisco Vegara. CMOS Continuous-Time Selective Change Driven Vision Sensor. XXIX Conference on Design of Circuits and Integrated Systems, DCIS 2014, November 2014, Madrid (Spain). pp: 1-6. PDF.

  2. Fernando Pardo, Jose A. Boluda and Francisco Vegara. Cámara USB para un sensor de visión selectiva guiada por cambios. V Jornadas de Computación Empotrada, JCE 2014, September 2014, Valladolid (Spain). pp 151-156. PDF.

2013

  1. Francisco Vegara, Pedro Zuccarello, Jose A. Boluda and Fernando Pardo. Taking Advantage of Selective Change Driven Processing for 3D Scanning. Sensors. ISSN: 1424-8220. Vol. 13, Issue 10. October 2013. pp: 13143-13162. Free PDF available in MDPI (open access). DOI: 10.3390/s131013143

2012

  1. Jose A. Boluda, Pedro Zuccarello, Fernando Pardo and Francisco Vegara. On the Design of Change-driven Data-flow Algorithms and Architectures for High-speed Motion Analysis. 9th International Conference on Informatics in Control, Automation and Robotics, ICINCO 2012, July 2012, Rome (Italy). pp 548-553. DOI: 10.5220/0004120805480553.

2011

  1. Jose A. Boluda, Pedro Zuccarello, Fernando Pardo and Francisco Vegara. Selective Change Driven Imaging: A Biomimetic Visual Sensing Strategy. Sensors. ISSN: 1424-8220. Vol. 11, Issue 11. November 2011. pp: 11000-11020. Free PDF available in MDPI (open access). DOI: 10.3390/s111111000

  2. Fernando Pardo, Pedro Zuccarello, Jose A. Boluda, and Francisco Vegara. Advantages of Selective Change Driven Vision for
    resource-limited systems    . IEEE Transactions on Circuits and Systems for Video Technology. ISSN:     1051-8215. Vol. 21, Issue 10. October 2011. pp: 1415-1423. PDF available in IEEE Xplore. DOI: 10.1109/TCSVT.2011.2162761

  3. Fernando Pardo y José A. Boluda. VHDL: Lenguaje para síntesis y modelado de circuitos.

2010

  1. P. Zuccarello, F. Pardo,  A. de la Plaza, and J.A. Boluda. 32x32 winner-take-all matrix with single winner selection. Electronics Letters. ISSN: 0013-5194. Vol. 46, Issue 5. March 2010. pp: 333-335. PDF available in IEEE Xplore. DOI: 10.1049/el.2010.1963

  2. P. Zuccarello, F. Pardo, A. de la Plaza and J. A. Boluda, A 32x32 pixels vision sensor for Selective Change Driven readout strategy, 36th European Solid-State Circuits Conference, ESSCIRC 2010, September 2010, Seville (Spain). ISBN: 978-84-693-6437-6.

  3. Fernando Pardo y Jose A. Boluda. Laboratorio de Arquitecturas Avanzadas con Cell y PlayStation 3. XXI Jornadas de Paralelismo (SATERCO), JP2010, CEDI 2010, Valencia, España, Septiembre 2010. PDF (438 KB).

2009

  1. Jose A. Boluda, Francisco Vegara, Fernando Pardo and Pedro Zuccarello. Selective Change-Driven Image Processing: a Speeding-up Strategy. Iberoamerican Congress on Pattern Recognition, CIARP 2009. Springer Lecture Notes in Computer Science. ISSN: 0302-9743. Vol. 5856. November 2009. pp: 37-44. PDF available in SpringerLink. DOI: 10.1007/978-3-642-10268-4_4

  2. Fernando Pardo and Jose A. Boluda. SimuRed: A flit-level event-driven simulator for multicomputer network performance evaluation. Computers and Electrical Engineering. ISSN: 0045-7906. Vol. 35, Number 5. September 2009. pp: 803-814. PDF available in ScienceDirect. DOI: 10.1016/j.compeleceng.2009.02.004

  3. Francisco Vegara, Jose A. Boluda, Juan Domingo, Fernando Pardo, Xaro Benavent. Accelerating Motion Analysis Algorithms with a Pixel Change-Driven Scheme. The 2009 International Conference on Image Processing, Computer Vision, and Pattern Recognition 2009, IPCV 2009. Las Vegas, EE.UU. July 2009. pp 895-900.

2008

  1. Fernando Pardo, Jose A. Boluda, Francisco Vegara and Pedro Zuccarello. On the advantages of asynchronous pixel reading and processing for high-speed motion estimation. Advances in Visual Computing, 4th International Symposium, ISVC 2008. Springer Lecture Notes in Computer Science. ISSN: 0302-9743. Vol. 5358. December 2008. pp: 205-215. PDF available in SpringerLink. DOI: 10.1007/978-3-540-89639-5_20

2007

  1. Julio C. Sosa, Jose A. Boluda, Fernando Pardo and Rocío Gómez-Fabela. Change-Driven data flow image processing architecture for optical flow computation. Journal of Real-Time Image Processing. Special Issue on Field-Programmable Technology for Real-Time Image Processing. ISSN: 1861-8200. Vol. 2, Number 4. December 2007. pp: 259-270. PDF available in SpringerLink. DOI: 10.1007/s11554-007-0060-y

  2. Jose A. Boluda and Fernando Pardo. Speeding-up Differential Motion Detection Algorithms Using a Change-Driven Data Flow Processing Strategy. Computer Analysis of Images and Patterns, CAIP 2007. Springer Lecture Notes in Computer Science. ISSN: 0302-9743.  Vol 4673. August 2007. pp: 77-84. PDF available in SpringerLink. DOI: 10.1007/978-3-540-74272-2_10

  3. Julio C. Sosa, Jose A. Boluda, Fernando Pardo. Arquitectura de Alta Velocidad para el Procesado de Imágenes en Tiempo Real. XXIX Congreso Internacional de Ingeniería Electrónica, ELECTRO2007, Chihuahua, Mexico. Octubre de 2007. pp 163-168.

2006

  1. Julio C. Sosa, Rocio Gómez-Fabela, Jose A. Boluda, Fernando Pardo.. Change-Driven Image Processing Architecture with Adaptive Threshold for Optical-Flow Computation. The 3rd International Conference on ReConFigurable Computing and FPGA's, RECONFIG'06. St. Luís Potosí, Mexico. Septiembre de 2006. pp 237-244. Proceedings edited by IEEE Computer Society. PDF available at computer.org. DOI: 10.1109/RECONF.2006.307775

  2. Julio C. Sosa, Rocio Gómez-Fabela, Jose A. Boluda, Fernando Pardo. . FPGA implementation of a change-driven image processing architecture for optical flow computation. 2006 International Conference on Field Programmable Logic and Applications. Madrid, Spain, August 2006. pp 663-666. Proceedings edited by IEEE Computer Society. PDF available at computer.org. DOI: 10.1109/FPL.2006.311285

  3. Fernando Pardo, Xaro Benavent, Jose A. Boluda, Francisco Vegara. Selective Change-Driven image processing for high-speed motion estimation. IWSSIP 2006. 13th International Conference on Systems, Signals and Image Processing. pp 163-166. Budapest, Hungary, September 2006. PDF (1049 Kb)

2005

  1. Fernando Pardo, Jose A. Boluda, Xaro Benavent, Juan Domingo. Circle detection and tracking speed-up based on change-driven image processing. ICGST International Conference on Graphics, Vision and Image Processing. GVIP-05. Cairo, Egypt, December 2005.

  2. J. A. Boluda and F. Pardo La enseñanza de Periféricos con VHDL y lógica programable. V Jornadas de Computación Reconfigurable y Aplicaciones. JCRA'2005. Granada, Spain, September 2005. pp: 383-386.

2004

  1. José A. Boluda y Fernando Pardo. Tecnología y diseño de sistemas digitales. E. Moliner. 2004. ISBN: 84-688-5750-5.

  2. Fernando Pardo, Jose A. Boluda and Esther De Ves. Feature extraction and correlation for time-to-impact segmentation using log-polar images. Computational Science and its Applications, ICCSA 2004. Springer Lecture Notes in Computer Science. ISSN: 0302-9743. Vol. 3046. May 2004. pp: 887-895. PDF available in SpringerLink. DOI: 10.1007/b98054

  3. J.C. Sosa, R. Gómez, F.Pardo and J.A. Boluda. Visión Log-Polar Basada en una FPGA y el Bus PCI para aplicaciones en Tiempo-Real. Congreso Internacional de Cómputo Reconfigurable y FPGAs. ReConFig'04. Colima, México, September 2004, pp. 210-219.

  4. J.A. Boluda and F. Pardo. Space-Variant image processing: Taking advantage of data reduction and polar coordinates Electronic Imaging. SPIE's International Technical Group Newsletter. Special Issue on Smart Image Acquisition Processing. Vol. 14, Number 1. January 2004. pp: 10-12. PDF available here.

  5. F. Pardo and J. A. Boluda. SimuRed: Un simulador de redes de multicomputadores interactivo y visual. XV Jornadas de Paralelismo. Almería, Spain, September 2004. pp: 351-355.

  6. J. C. Sosa, F. Pardo, J. A. Boluda and R. Gómez. Desarrollo de una Interfaz PCI para un Sistema de Visión en una FPGA. IV Jornadas sobre Computación Reconfigurable y Aplicaciones, JCRA04. Barcelona, Spain, September 2004. pp: 531-540.

2003

  1. Fernando Pardo y José A. Boluda. VHDL: Lenguaje para síntesis y modelado de circuitos. Segunda edición para España. Editorial RA-MA 2003. ISBN: 84-7897-595-0.

  2. J.A. Boluda and F. Pardo. Synthesizing on a reconfigurable chip an autonomous robot image processing system. Field Programmable Logic and Applications, FPL 2003. Springer Lecture Notes in Computer Science. ISSN: 0302-9743. Vol. 2778. September 2003. pp: 458-467. PDF available in SpringerLink. DOI: 10.1007/b12007

  3. J.A. Boluda and F. Pardo. A reconfigurable architecture for autonomous visual navigation. Machine Vision and Applications. ISSN: 0932-8092. Vol. 13, Number 5-6. March 2003. pp: 322-331. PDF available in SpringerLink. DOI: 10.1007/s00138-002-0078-x

  4. F. Pardo, J.A. Boluda and J.C. Sosa. A log-polar image processing system on a chip. XVIII Design of Circuits and Integrated Systems, DCIS03. Ciudad Real, Spain, November 2003. pp 449-454.

  5. F. Pardo and J. A. Boluda. Tarjeta de desarrollo para el laboratorio de microcontroladores PIC. XIV Jornadas de Paralelismo. Madrid, Spain, September 2003. pp: 287-290.

  6. F. Pardo, J. A. Boluda and J. C. Sosa. Transformación Log-Polar en FPGAs Utilizando CORDIC. III Jornadas sobre Computación Reconfigurable y Aplicaciones, JCRA03. Madrid, Spain, September 2003. pp: 99-106.

  7. J. C. Sosa, F. Pardo, and J. A. Boluda. Implementación de un control neuronal en una FPGA y su comparación con otras técnicas de control. III Jornadas sobre Computación Reconfigurable y Aplicaciones, JCRA03. Madrid, Spain, September 2003. pp: 309-316.

2002

  1. F. Pardo, J.A. Boluda, I. Coma. and F. Micó High speed log-polar time to crash calculation for mobile vehicles. Image Processing & Communications. ISSN: 1425-140X. Vol. 8, Number 2. 2002. pp: 23-32. PDF available here.

  2. J.A. Boluda, F. Pardo, E. de Ves. Estimating time-to-impact data with an autonomous vehicle portable pipelined architecture. TELEC'2002. Santiago de Cuba, Cuba, July 2002. ---PDF (289 Kb)

  3. F. Pardo, J.A. Boluda, E. de Ves. Development board for the microcontroller lab. TELEC'2002. Santiago de Cuba, Cuba, July 2002. PDF (153 Kb)

  4. E. de Ves, F. Pardo, J.A. Boluda. High-speed movement analysis from log-polar images using dynamic feature extraction and correlation. TELEC'2002. Santiago de Cuba, Cuba, July 2002. ---PDF (142 Kb)

2001

  1. Rafael J. Martínez, José A. Boluda y Juan J. Pérez. Estructura de computadores y periféricos.

- Edición para Hispanoamerica. Editorial Alfa Omega 2001. ISBN: 970-15-0690-1

- Edición para España. Editorial RA-MA 2001. ISBN: 84-7897-447-4.

  1. J.A. Boluda and J. Domingo. On the advantages of combining differential algorithms, pipelined architectures and log-polar vision for detection of self-motion from a mobile robot. Robotics and Autonomous Systems. ISSN: 0921-8890. Vol. 37, Number 4. December 2001. pp: 283-296. PDF available in Science direct. DOI: 10.1016/S0921-8890(01)00160-9

  2. I. Coma, F. Pardo, J.A. Boluda and F. Micó. Virtual-reality environment for 3D scene reconstruction from time to impact log-polar mapping. SERVICEROB 2001. Santorini, Greece, June 2001. pp. 75-80.

  3. F. Pardo, F. Micó, J.A. Boluda and I. Coma. High-speed log-polar time to crash calculation of mobile vehicles. SERVICEROB 2001. Santorini, Greece, June 2001. pp. 27-33.

  4. J.A. Boluda, F. Pardo and F. Micó. Arquitecturas reconfigurables de procesamiento de imágenes para la navegación de robots autónomos. I Jornadas sobre Computación Reconfigurable y Aplicaciones, JCRA01. Alicante, Spain, September 2001. pp: 166-173.

2000

  1. Fernando Pardo y José A. Boluda. VHDL: Lenguaje para síntesis y modelado de circuitos. Edición para Hispanoamérica. Editorial Alfa Omega 2000. ISBN: 970-15-0443-7.

  2. J.A. Boluda, J. Domingo, F. Pardo and J. Pelechano. FPGA Implementation of a Log-Polar Motion Detection Algorithm. Intelligent Autonomous Systems 6. Venice, Italy, July 2000.

  3. F. Pardo, I. Llorens, F. Micó and J.A. Boluda. Space variant vision and pipelined architecture for time to impact computation. International Workshop on Computer Architectures for Machine Perception, CAMP 2000. Padova, Italy, September 2000. pp. 122-126. Proceedings edited by IEEE Computer Society. PDF available at computer.org. DOI: 10.1109/CAMP.2000.875967

1999

  1. Fernando Pardo y José A. Boluda. VHDL: Lenguaje para síntesis y modelado de circuitos. Primera edición para España. Editorial RA-MA 1999. ISBN: 84-7897-351-6.

  2. J.A. Boluda, F. Blasco, F. Pardo and J. Pelechano. A pipelined reconfigurable architecture for visual-based navigation. Euromicro99. September 1999. pp. 71-74. Edited by IEEE Computer Society. PDF available at computer.org. DOI: 10.1109/EURMIC.1999.794449

  3. J.A. Boluda, F. Pardo and F. Blasco. A scalable reconfigurable FPGA based architecture for robotic navigation. XIV Design of Circuits and Integrated Systems, DCIS99. Palma de Mallorca, Spain, November 1999. pp. 831-836. ---compressed postscript file

  4. F. Blasco, F. Pardo and J.A. Boluda. A FPGA based PCI bus interface for a real-time log-polar image processing system. XIV Design of Circuits and Integrated Systems, DCIS99. Palma de Mallorca, Spain, November 1999. pp. 379-384. ---compressed postscript file

1998

  1. J.A. Boluda, F. Pardo and J. Pelechano. Reconfigurable architectures for machine perception. An approach for autonomous vehicle navigation. Workshop on European Scientific and Industrial Collaboration on promoting advanced technologies in manufacturing, WESIC'98. Girona, Spain, June 1998. pp. 359-363. ---compressed postscript file (36 Kbytes)

  2. F. Blasco, F. Pardo and J.A. Boluda. Sistema de adquisición de imágenes log-polares con alta velocidad basado en bus PCI. XIX Jornadas de Automática. Madrid, Spain, September 1998. pp: 277-280.---compressed postscript file (44 Kbytes)

  3. J.A. Boluda, F. Pardo, F. Blasco and J. Pelechano. Una arquitectura segmentada para el cálculo del tiempo al impacto con visión log-polar. XIX Jornadas de Automática. Madrid, Spain, September 1998. pp: 281-285.---compressed postscript file (51 Kbytes)

1997

  1. J.A. Boluda, J. Domingo, F. Pardo and J. Pelechano. Detecting motion independent of the camera movement through a log-polar differential approach. Computer Analysis of Images and Patterns, CAIP 1997. Springer Lecture Notes in Computer Science. Vol. 1296. ISSN: 0302-9743. September 1997. pp: 702-709. PDF available in SpringerLink. DOI: 10.1007/3-540-63460-6_181

  2. J.A. Boluda, J. Domingo, F. Pardo and J. Pelechano. Motion Detection Independent of the Camera Movement with a Log-Polar Sensor. Proc. of the 13th International Conference on Digital Signal Processing, Santorini, Greece, July 1997. pp. 809-812. Proceedings edited by IEEE . PDF available at ieeexplore.ieee.org. DOI: 10.1109/ICDSP.1997.628476

  3. F. Pardo, J.A. Boluda Cámaras CMOS y visión foveal. Seminario Anual de Automática, Electrónica Industrial e Instrumentación, SAAEI'97. Valencia, Septiembre 1997. pp: 316-321.

1996

  1. J.A. Boluda, F. Pardo, T. Kayser, J.J. Perez, and J. Pelechano. A new foveated space-variant camera for robotic applications. Third IEEE, International Conference on Electronics Circuits and Systems, ICECS'96, Rodos, Greece, October 1996. pp. 680-683. Proceedings edited by IEEE . PDF available at ieeexplore.ieee.org. DOI: 10.1109/ICECS.1996.584453

  2. F. Pardo, J.A. Boluda, J.J. Pérez, S. Felici, B. Dierickx and D. Scheffer. Response properties of a foveated space-variant CMOS image sensor, 1996 IEEE International Symposium on Circuits And Systems, ISCAS'96, Atlanta, USA, May 1996. pp 373-376. Proceedings edited by IEEE . PDF available at ieeexplore.ieee.org. DOI: 10.1109/ISCAS.1996.539907

  3. F. Pardo, J.A. Boluda, J.J Perez, B. Dierickx, and D. Scheffer. Design issues on CMOS space-variant image sensors. Advanced Focal Plane Arrays and Electronic Cameras, SPIE proceedings series, 1996, vol 2950, pp. 98-107. Proceedings edited by SPIE. PDF available at spie.org. DOI: 10.1117/12.262514

  4. J.A. Boluda and J.J. Perez and S. Felici and E. de Ves and F. Pardo and S. Pelaez and J.M. Insenser, A custom communication system for I/O control in industrial applications, XI Design of Integrated Circuits and Systems, DCIS'96, pag. 76-78, Sitges, Spain, November 1996. --- compressed postscript file (166 Kbytes)

  5. F. Pardo, J.A. Boluda, J.J. Perez, S. Felici, and B. Dierickx. Design of a foveated log-polar image sensor using standard CMOS technology. XI Design of Integrated Circuits and Systems, pag. 49-54, DCIS'96, Sitges, Spain, November 1996. --- compressed postscript file (602 Kbytes)

  6. J.A. Boluda and S. Felici and J.J. Solano and E. de Ves and F. Pardo. Proyecto Puente de Lavado: Una experiencia de diseño en el marco de la colaboración Universidad-Industria, Segundo Congreso hispano-americano de diseño de Circuitos Integrados IBERCHIP'96, Sau Paulo, Brasil, pages 69-77, February 1996. --- compressed postscript file (140 Kbytes)

  7. J.A. Boluda and F. Pardo. Fallos en sistemas informáticos. JUMPING. N¤ 8. March 1996. pp:32-34.

  8. S. Felici, J. J. Pérez, F. Pardo and J.A. Boluda. Evolución de la arquitectura PC en Backplane. Mundo Electrónico Nº 266, April 1996. pp:56-63.

  9. J.A. Boluda and F. Pardo. Tecnología y fabricación de circuitos integrados. Cómo se hace un chip I. JUMPING N. 12. July 1996. pp:30-35.

  10. J.A. Boluda and F. Pardo. Tecnología y fabricación de circuitos integrados. Cómo se hace un chip II. JUMPING N. 13. September 1996. pp:38-41.

  11. J.A. Boluda, F. Pardo, J.J. Perez, J. Domingo and J. Pelechano. Seguimiento de objetos mediante una cámara log-polar con movimiento propio. XVII Jornadas de Automática. Santander. September 1996. pp:79-84. --- compressed postscript file (167 Kbytes)

1995

  1. R.J. Martinez and C. Perez and G. Fabregat and J.A. Boluda and F. Pardo. DPU: a FB+ based fault-tolerant system, Open Bus Systems, OBS'95, Zurich, Switzerland, pages 229-236, October 1995.

  2. Fernando Pardo and Paco Vegara and Jose A. Boluda and Santiago Felici. Sensores CMOS para robótica e industria: Sensor retínico espacio variante y visión activa, Cuarto Congreso AER-ATP, pages 101-106, Zaragoza, Spain, October 1995 --- compressed postscript file (116 Kbytes)

1994

  1. Fernando Pardo, J.A. Boluda, Rafael Martínez y Carlos Pérez. FUTUREBUS+: Aplicación en Sistemas Tolerantes a Fallos, Mundo Electrónico Nº 246, Marzo 1994, Boixareu Editores, pp. 44-49.

  2. Fernando Pardo, J.A. Boluda, Rafael Martínez y Carlos Pérez. Lógica Programable, Criterios de Selección, Mundo Electrónico, Junio-Julio 1994, Boixareu Editores, pp. 27-31.