Image processing in the spatial domain is a very complicated task, which cannot be covered neither in this report nor in dedicated literature. Extracting spatial information from 1-D or 2-D images generally involves: regularization to constrain the ill-posed problems, applying a priori information to further restrict the solution space, and constrain the image or scene (for example at industrial sites). Without these simplifying assumptions, it is impossible to solve image processing problems, at least for natural scenes. This complexity of image processing is directly transferred to vision chips trying to emulate image processing tasks. While computational algorithms are progressing, most vision chips have adopted biological models, as live examples of successful vision systems. Most biological models proposed for vision have simple architectures not rivaled by computational models. However, biological models generally suffer from excessive simplification due to insufficient understanding of biological visual systems.
With this introduction I skip the basic principles for many spatial image processing algorithms and instead describe circuits and building blocks required for these algorithms.
Hardware realization of computational models, in addition to requiring complex arithmetic operations, often need involving spatial information over a large neighborhood. Interconnections are known to be a major limiting factor in realizing networks of any type and size. Therefore, computational models are not considered as VLSI friendly in this sense. Biological models, on the other hand, use simple functional blocks interacting with their nearest neighbors, features which are very attractive to VLSI implementations.