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Mahowald and Mead's silicon retina

 

Mahowald's silicon retina chip is among the first vision chips which implemented a biological facet of vision on silicon [Mahowald 94a, Mead 89b]. The computation performed by Mahowald's silicon retina is based on models of computation in distal layers of the vertebrate retina, which include the cones, the horizontal cells, and the bipolar cells. The cones are the light detectors. The horizontal cells average the outputs of the cones spatially and temporally. Bipolar cells detect the difference between the averaged output of the horizontal cells and the input.

In this silicon retina the cones have been implemented using parasitic phototransistors and MOS-diode logarithmic current to voltage converters. Averaging is performed using a hexagonal network of active resistors as shown in Figure 2.2. The resistors are implemented using the horizontal resistor described in [Mead 89b]. The shape of the smoothing operation performed by the resistive network is similar to the charge distribution in semiconductors, and is an exponential function. The smoothing factor depends on the value of the resistors (or diffusion constant in semiconductors).

This silicon retina is in fact a simple implementation of other silicon retinas, which will be described later and are referenced in [Andreou and Boahen 94b, Bair and Koch 91b]. In those implementations two separate smoothing networks with different smoothing constants are used. The corresponding outputs of the two smoothing networks are then compared using a differentiating function, such as division or subtraction. In Mahowald's silicon retina only one smoothing network has been implemented. Yet it demonstrates many similarities between the signals obtained from a real retina (of a mud puppy) with those obtained from the silicon retina.

   figure195
Figure 2.2: Architecture of Mahowald's silicon retina.


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next up previous contents
Next: Mead's adaptive retina Up: Spatial Image Processing Vision Previous: Introduction

Alireza Moini,
Centre for High Performance Integrated Technologies and Systems (CHIPTEC),
Adelaide, SA 5005,
March 1997