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Kramer et al.'s velocity sensor

 

Kramer et al.'s vision chip is a 1D motion detector [Kramer et al. 95]. The algorithm used in the implementation is rather intuitive, though the basic element used is very similar to elementary motion detection (EMD) units. The architecture of the motion detection unit is shown in Figure 3.21. I represents the photodetectors which use the Delbrück's adaptive photocircuit [Mead 94], E, is the edge detection circuit, P is a pulse shaping circuit, and M is the motion computation element. The edge detection circuit E, which is shown in Figure 3.22, issues an output current pulse on the occurrence of an increase of the input light intensity. The output of the edge detector is input to the pulse shaping circuit P, shown in Figure 3.23, and two voltage pulses are generated. One of them, tex2html_wrap_inline7474 , basically follows the shape of the input current spike, while the other one, tex2html_wrap_inline7476 , only follows the increasing edge and has a long decaying tail.

The motion detection unit M samples the tex2html_wrap_inline7476 output from one channel by the tex2html_wrap_inline7474 of the other channel. If there is no motion, the tex2html_wrap_inline7476 outputs will be low. If there is a motion, for example from detector 1 to detector 2, the output of unit tex2html_wrap_inline7486 will detect a none-zero value. The value of this voltage will be higher, if the time between the start of the decay of tex2html_wrap_inline7488 and the tex2html_wrap_inline7490 spike is shorter.

The chip has been designed and fabricated in a 2 tex2html_wrap_inline7217 m CMOS process. Each cell takes an area of 50,000 tex2html_wrap_inline7428 . The chip has shown some degree of robustness to contrast and light level variations.

   figure956
Figure: Architecture of Kramer et al.'s motion detection system.

   figure964
Figure: Kramer et al.'s temporal edge detection circuit.

   figure972
Figure 3.23: Circuit to generate a fast and a slowly decaying signal.


Jorg Kramer's home page

To obtain a PS file about the design of this chip (210K)



next up previous contents
Next: Indiveri et al.'s time-to-crash Up: Spatio-Temporal Image Processing Vision Previous: Gottardi and Yang's CCD/CMOS

Alireza Moini,
Centre for High Performance Integrated Technologies and Systems (CHIPTEC),
Adelaide, SA 5005,
March 1997