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CCD processes have originally been developed for analog signal
processing and imaging devices. Although this may have facilitated
the design of vision chips, due to their drawbacks there has been
limited success in achieving functional and reliable vision chips.
Major drawbacks of CCD and CCD/CMOS with respect to CMOS are:
- Clocking: To perform even simple operations large number
of clock phases are required, these clock phases should be
distributed to all cells
- Process optimization: Special CCD processes do not have
optimized CMOS devices and CCD/CMOS processes do not have optimized
CCD structures
- Special read and write circuit: For transferring signals
between CMOS and CCD parts in a CCD/CMOS circuit special read/write
circuits are necessary
- Large area: Occupying large area per cell due to the above
items
- Digital noise: Massive clock-induced-noise to analog
circuits in mixed CCD/CMOS approach
- Power: Power consumption due to large voltage transients
required for clocking the gates of CCD structures (large capacitive
loads)
Despite these numerous drawbacks, CCDs offer easier solutions for some
operations. For example, in a smoothing CCD vision chip the smoothing
width can be increased by only leaving the circuit to operate over
more clock cycles. In other words, CCDs are capable of iterating a
function without demands on additional space.
Next: GaAs MESFET and HEMT
Up: Technology
Previous: BiCMOS
Alireza Moini,
Centre for High Performance Integrated Technologies and Systems (CHIPTEC),
Adelaide, SA 5005,
March 1997