library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity ascensor_stub is port ( motor_bajar : out std_logic; motor_subir : out std_logic; puerta : out std_logic; cerrado : in std_logic; abierto : in std_logic; celula : in std_logic; nivel : in std_logic; reset : in std_logic; clk : in std_logic; piso : in std_logic_vector(3 downto 0); boton : in std_logic_vector(3 downto 0) ); end ascensor_stub; architecture mapping of ascensor_stub is -- Declaration of the mapped component component ascensor port ( motor_bajar : out std_logic; motor_subir : out std_logic; puerta : out std_logic; cerrado : in std_logic; abierto : in std_logic; celula : in std_logic; nivel : in std_logic; reset : in std_logic; clk : in std_logic; piso0 : in std_logic; piso1 : in std_logic; piso2 : in std_logic; piso3 : in std_logic; boton0 : in std_logic; boton1 : in std_logic; boton2 : in std_logic; boton3 : in std_logic ); end component; begin dut : ascensor_hide port map ( motor_bajar => motor_bajar, motor_subir => motor_subir, puerta => puerta, cerrado => cerrado, abierto => abierto, celula => celula, nivel => nivel, reset => reset, clk => clk, piso0 => piso(0), piso1 => piso(1), piso2 => piso(2), piso3 => piso(3), boton0 => boton(0), boton1 => boton(1), boton2 => boton(2), boton3 => boton(3) ); end mapping; library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity test_ascensor is end test_ascensor; architecture testbench of test_ascensor is -- Declaration of the component under test component ascensor port ( motor_bajar : out std_logic; motor_subir : out std_logic; puerta : out std_logic; cerrado : in std_logic; abierto : in std_logic; celula : in std_logic; nivel : in std_logic; reset : in std_logic; clk : in std_logic; piso : in std_logic_vector(3 downto 0); boton : in std_logic_vector(3 downto 0) ); end component; signal motor_bajar : std_logic; signal motor_subir : std_logic; signal puerta : std_logic; signal cerrado : std_logic; signal abierto : std_logic; signal celula : std_logic; signal nivel : std_logic; signal reset : std_logic; signal clk : std_logic; signal piso : std_logic_vector(3 downto 0); signal boton : std_logic_vector(3 downto 0); begin reset<='1','0' AFTER 150 ns; PROCESS BEGIN clk<='0'; LOOP WAIT FOR 50 ns; clk<=NOT clk; END LOOP; END PROCESS; PROCESS BEGIN celula<='0'; abierto<='1'; cerrado<='0'; nivel<='0'; piso<="0001"; boton<="0000"; WAIT FOR 300 ns; nivel<='1'; WAIT FOR 300 ns; boton<="0100"; WAIT FOR 300 ns; boton<="0000"; abierto<='0'; celula<='1'; WAIT FOR 300 ns; celula<='0'; WAIT FOR 300 ns; cerrado<='1'; WAIT FOR 300 ns; piso<="0010"; nivel<='0'; WAIT FOR 300 ns; piso<="0100"; WAIT FOR 300 ns; nivel<='1'; cerrado<='0'; WAIT FOR 300 ns; abierto<='1'; WAIT FOR 300 ns; boton<="0011"; WAIT; END PROCESS; dut : ascensor port map ( motor_bajar => motor_bajar, motor_subir => motor_subir, puerta => puerta, cerrado => cerrado, abierto => abierto, celula => celula, nivel => nivel, reset => reset, clk => clk, piso => piso, boton => boton ); end testbench;